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| 篇名 |
A 0.5-V SUBTHRESHOLD-LEAKAGE SUPPRESSED FULLY DIFFERENTIAL CMOS SWITCHED-CAPACITOR AMPLIFIER WITHOUT TRANSMISSION GATES
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| 並列篇名 |
A 0.5-V SUBTHRESHOLD-LEAKAGE SUPPRESSED FULLY DIFFERENTIAL CMOS SWITCHED-CAPACITOR AMPLIFIER WITHOUT TRANSMISSION GATES |
| 作者 |
Tsung-Sum Lee (Tsung-Sum Lee)、Chi-Chang Lu (Chi-Chang Lu) |
| 英文摘要 |
This paper presents a 0.5-V subthreshold-leakage suppressed fully differential CMOS switched-capacitor amplifier with ananalog T-switch, without transmission gates. The circuit design and major properties of the circuit are covered and the experimentalresults demonstrate the performance of this circuit. The switched-capacitor amplifier operates with a signal-to-total harmonicdistortion ratio of 37dB for a 10-kHz sinusoidal amplitude input of 0.1Vpp. The power dissipation of this circuit is 36.21-μW. Thecircuit was fabricated using a standard 0.18-μm CMOS process. Experimental results confirmed the applicability of using analogT-switches to fulfill the circuit requirements. |
| 起訖頁 |
1-4 |
| 關鍵詞 |
low-voltage、subthreshold-leakage、CMOS、switched-capacitor amplifier |
| 刊名 |
創新科技期刊 |
| 期數 |
201909 (1:2期) |
| 出版單位 |
國立雲林科技大學
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