An FPGA-Based BCI System with SSVEP and Phased Coding Techniques

An FPGA-Based BCI System with SSVEP and Phased Coding Techniques

A Field Programmable Gate Array (FPGA) was used to implement a Steady State Visual Evoked Potential (SSVEP) -based Brain Computer Interface (BCI) system with phased coding in this paper. There are several subsystems to be constructed including a visual stimulus penal, Electroencephalograph (EEG) acquisition circuit, EEG signal processor, and Bluetooth module, respectively. Additionally, we implemented a phase-coding circuit for SSVEP by FPGA to extend the control commands for a high-frequency stimuli flickering signal with 20 Hz by different phases (0°, 90°, 180°, and 270°) to relieve subjects' eyes fatigue. Then the Fast Fourier Transformation (FFT), also implemented by FPGA, was used to get the frequency spectrum to find the relative stimulus frequency on EEG signals. A white-colored LED was also used to act as a visual stimulus source to get more performance. From experimental results, the acceptable correct rate can be obtained with a FPGA-based BCI system with SSVEP and phase-coding techniques.