以現場可規劃邏輯陣列閘植基於類小腦神經網路之文字辨識研究

Character Recognition Based on CMAC with Field Programmable Gate Array

本文中，我們在FPGA 晶片中置入類小腦神經網路並應用於字型辨識研究領域。植基於最小均方學習法，類小腦神經網路在運作速度上擁有相當多之優點，它可以隨意的完成非線性映射以及以硬體實現。類小腦神經網路為一學習方法，實務處理上，它利用非線性映射，以查表記憶體取代複雜的數學函數式的學習程序，快速的得到輸出結果。在本論文中，我們以Xilinx 公司20 萬邏輯閘40MHz Spartan II XC2S200-5PQ208 晶片實現一全新之群集模組類神經網路。與執行於2.5GHz Pentium IV 個人電腦之軟體比較，速度約快35 倍以上。由實驗數據可以看出，在8×8 測試字型中加入部份之雜訊，我們所設計之硬體還可以清晰地辨識出電腦鍵盤中所列出之94 個字型。

We propose a Cerebellar Model Arithmetic Computer (CMAC) neuralnetwork for character recognition with an FPGA architecture. The CMAChas many advantages in terms of speed of operation based on LMS training.Its ability realizes arbitrary nonlinear mapping and fast practical hardwareimplementation. The CMAC, being a learning algorithm, can rapidly obtainoutput using nonlinear mapping with look-up table memory to replace thecomplex learning process using mathematical functions. This paperpresents CMAC hardware (Xilinx Spartan II XC2S200-5PQ208 40MHz)that is about 35 times faster than conventional software executed on aconventional processor (PC Pentium IV 1.5 GHz). In the experimentalresults, the proposed CMAC hardware has shown that it can clearlydistinguish 94 characters of 8×8 pixel size with some noise in the testpatterns.