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篇名
Networks-on-Chip Router: Configuration and Implementation
作者 Wen-Chung Tsai (Wen-Chung Tsai)Kuo-Chih Chu (Kuo-Chih Chu)
中文摘要
In this paper, we introduce a communication IP for System-on-Chip (SoC) namely Configurable Networks-on-Chip Router (CNoC-Router), which can perform various kinds of topology configuration for an on-chip network. With the flexible topology configuration and an adaptive routing scheme, CNoC-Router can enable a network with high performance using a relatively easy control. Synthesizable Register-Transfer-Level coding was designed and verified. Furthermore, a prototype based on Altera FPGA with a NIOS2 embedded micro-processor has been implemented to validate its practice.
英文摘要
In this paper, we introduce a communication IP for System-on-Chip (SoC) namely Configurable Networks-on-Chip Router (CNoC-Router), which can perform various kinds of topology configuration for an on-chip network. With the flexible topology configuration and an adaptive routing scheme, CNoC-Router can enable a network with high performance using a relatively easy control. Synthesizable Register-Transfer-Level coding was designed and verified. Furthermore, a prototype based on Altera FPGA with a NIOS2 embedded micro-processor has been implemented to validate its practice.
起訖頁 92-98
關鍵詞 Field Programmable Gate ArrayNetworks on ChipRouterSystem on Chip
刊名 資訊科技國際期刊  
期數 201412 (8:2期)
出版單位 朝陽科技大學資訊學院
該期刊-上一篇 多重分配檢測品質績效決策系統
該期刊-下一篇 RGSM-可達灰結構模型法的提案
 

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