Design of Low Power CMOS VCO Based on Current-Reused Topology for 10GHz Application

In this paper, we present low phase noise and low power of the current-reused VCO with additional current reused circuit for 10GHz application. The power and phase noise can be reduced by proposed VCO. The VCO was implemented by the standard 0.18um CMOS process. Operated at 1.3 V, the VCO circuitry consumes 2.64 mW of power. The total chip size is 0.61 mm x 0.69 mm. The VCO tuning range covers from 9.33 GHz to 10.89 GHz . The measured phase noise at 1-MHz offset from 10.8 GHz is -108.39 dBc/Hz, which leads to an excellent Figure-of-Merit (FOM) of -184.8 dBc/Hz.